摘要
A tool for the synthesis of fuzzy controllers is presented in this paper. This tool takes as input the behavioral specification of a controller and generates its VHDL description according to a target architecture. The VHDL code can be synthesized by means of two implementation methodologies, ASIC and FPGA. The main advantages of using this approach are rapid prototyping, and the use of well-known commercial design environments like Synopsys, Mentor Graphics, or Cadence.
摘要译文
本文提出了一种用于合成模糊控制器的工具。该工具将控制器的行为规范作为输入，并根据目标架构生成其VHDL描述。可以通过两种实现方法来合成VHDL代码：ASIC和FPGA 使用这种方法的主要优点是快速原型设计，以及使用知名的商业设计环境，如Synopsys，Mentor Graphics或Cadence
E. Lago[1];C.J. Jimenez;D.R. Lopez;S. Sanchez-Solano;A. Barriga. XFVHDL: a tool for the synthesis of fuzzy logic controllers[C]//Design, Automation and Test in Europe, 1998., Proceedings, Paris (167);Paris, France (4), 23-26 Feb. 1998, FR: IEEE, 1998: 107-102